IBM has found a way to connect chips inside products ranging from cell phones to supercomputers, an advance that promises to prolong battery life in wireless devices and eventually speed data transfers between the processor and memory chips in computers, the company said Thursday.
The manufacturing technique outlined by IBM Corp. eliminates the long metal wires that are currently used to transfer information and electrical charge between chips.
The memory and processor chips are often spaced inches apart from each other, causing a lag in transmission as chipmakers multiply the number and voracity of calculating cores on their processors.
Slowdowns crop up when data-hungry processors cannot retrieve information fast enough from memory to perform their increasingly complex functions.
In IBM’s solution, two chips are sandwiched on top of one another — the distance between them measured in microns, or millionths of a meter — and held together by vertical connections that are etched in silicon holes that are filled with metal.
The vertical connections are referred to as “through-silicon-vias,” which allow multiple chips to be stacked together with greater information flow between them. IBM said its three-dimensional approach creates the possibility of up to 100 times more pathways for information, and shortens by 1,000 times the distance that information on a chip needs to travel.
“This is a big step, this is a really historic move,” said David Lammers, director of WeSRCH.com, a social networking Web site for semiconductor enthusiasts and part of VLSI Research Inc.
“This has been studied to death, but it’s the first time a company is saying, ’We can connect two chips in the vertical direction.”’
While it has the most promise for use in computers, IBM’s technology will initially be used in wireless communications chips when production begins next year. Stacked chips are already used in cell phones, but IBM’s technology eliminates the need for wires wrapped around the outside of the chips.
The company said it could have memory-on-processor technology by 2009 for use in servers, supercomputers and other machines.
“We are continuing to innovate — now we have a new degree of freedom to get more functionality out of chips,” said Lisa Su, vice president for semiconductor research and development at IBM.
Stacking chips three-dimensionally can become problematic because of the intricacy of etching holes directly into the silicon, and because processors kick off so much heat, they can disrupt the normal functioning of the memory when attached so closely to it, according to analysts and IBM competitors.
Intel Corp., the world’s largest semiconductor company, used a similar three-dimensional structure in a research processor demonstrated in February that can perform about a trillion calculations per second. Such a computer chip can perform calculations as quickly an entire data center while consuming as much energy as a light bulb.
However, Jerry Bautista, director of technology management for Intel’s Microprocessor Technology Lab, said such an approach is “much more aggressive and risky” for production on a wide scale than simply moving the processor and the memory chip extremely close to each other. He said the Santa Clara-based company is still researching its options and has not publicly said when it might make such a technology available.
“We have a view that while 3-D stacking is very elegant, it’s not for the faint of heart,” Bautista said. “You better think hard about how you do it, because it’s not a slam dunk.”