updated 1/27/2011 3:18:20 PM ET 2011-01-27T20:18:20

SAN JOSE, Calif., Jan. 27, 2011 (GLOBE NEWSWIRE) -- Arasan Chip Systems, Inc. ("Arasan"), a leading provider of Total Semiconductor IP Solutions, announced that it has been developing the Universal Flash Storage (UFS) IP core, a next generation memory interface being finalized by JEDEC. Arasan has engaged with its strategic lead customers to help them productize this interface.

Anticipating the increasing size of embedded code and the requirement to store, share media in consumer electronics and systems, the JEDEC standard's body has embarked on defining a Universal Flash Storage (UFS) standard. This standard is expected to scale in performance and features to span existing and emerging usage models for non-volatile memory.

The UFS standard is based on modular layered protocol architecture. This architecture enables an efficient interface implementation with the ability to scale the interface to meet future performance requirements. Arasan with its domain expertise and involvement with the JEDEC body has been developing a complete IP core solution for UFS – spanning Software, Controller IP, MIPI UniPro Link, and M-PHY IP.

"Implementing a complex memory interface such as UFS requires an in-depth understanding of the UFS specification and architecture," said Prakash Kamath, Vice President of Engineering at Arasan. "Customers can rely on our UFS IP core, backed by the confidence in our expertise, to hasten introduction of their SoC's."

"SoC designers are looking for a common non-volatile memory interface that can support different system architectures while ensuring they have a wide supply of memory chips," added Kamath. "Arasan is committed to keeping our UFS IP in synch with the evolving JEDEC standard, which is scheduled to get ratified in the first half of 2011."

Arasan's high-quality UFS IP core is designed using our rigorous IP design and verification methodology, making Arasan the preferred choice for first time silicon success. Arasan offers a Total IP Solution for the UFS IP, which consists of RTL IP for the controller, PHY IP, verification IP and a portable software stack – all backed by our World-class customer support.

About Arasan

Enabling Technology Adoption through Total IP Solutions -- The Bus Stops Here!

Arasan Chip Systems based in San Jose, CA, USA, is a world-leading supplier of SoC Intellectual Property Solutions with a successful 15 year track record. Arasan delivers technology-leading IP focused on Bus Interfaces such as MIPI, SDIO, USB, PCIe, Ethernet, and Flash Storage Solutions of NAND, eMMC, SD, CF+, UFS and more, to the global electronics market. Arasan's Total Solution Approach starts with Technology Consulting using our Domain Expertise and includes all the building blocks required for technology adoption- RTL IP cores, Analog Mixed Signal IP Cores, Verification IP,  Portable Software Drivers / Stacks, Protocol Test & Analyzers, HDK's, and associated design services. Arasan Total IP Solution enables the rapid adoption of emerging technologies reducing our customer's time to market while minimizing risk and ensuring compliance to respective standards. 

Catch Arasan on Twitter at www.twitter.com/arasan_chip_sys

The Arasan Chip Systems, Inc. logo is available at http://www.globenewswire.com/newsroom/prs/?pkgid=2738

CONTACT: Sales Contact
         Richard Timpa
         Arasan Chip Systems, Inc.
         408-282-1600 x104
         timpa@arasan.com
         
         PR Contact
         Ursula Hultqvist
         Arasan Chip Systems, Inc.
         408-282-1600 x233
         pr@arasan.com

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